Conventional ROM-based implementations for noise shaping DDS circuits typically include a Read-Only Memory (ROM) having a look-up table, a digital-to-analog converter (DAC), and a filter that produces a sinusoidal output. From the sinusoidal output, a digital clock signal can be produced using a comparator. ROM-less systems, on the other hand, work in conjunction with a digital-to-phase converter or a digital-to-time converter (DTC) to directly provide a square wave. With respect to the present invention, a “ROM-less DDS” does not include a ROM to look-up values for a value of sine as a function of phase, but may incidentally have other ROM devices used for other purposes (such as for compensation for mismatch on a delay line, for example).
The behavior of a DTC 46 is illustrated in FIGS. 4 and 5. The DTC produces a delayed pulse, where the delay between the edge of the system clock and the rising edge of the output pulse depends on the input, TapPick. The DTC 46 is enabled to output a pulse when the input, overflow_in, is HIGH. TapPick is an integer that is N+1 bits wide and ranges from 0 to 2N, and since the total delay of the delay line is matched to the clock period, Tclk, the delay between the edge of the system clock and the rising edge of the output pulse equals
                    T        clk            ·      TapPick              2      N        .
TapPick=2N produces the same pulse as would TapPick=0 in the next cycle, hence a different implementation of the DTC could allow TapPick to range only from 0 to 2N−1.
A typical ROM-less DDS circuit computes the inputs of the DTC using an accumulator and a divider. FIG. 7 shows a plot of the output of the accumulator, and the corresponding output of the DTC. A cycle in which the accumulator output crosses through 2k, where k is the width of the accumulator, is a cycle in which overflow=1. The DTC places a pulse in its output that aligns with the point where the accumulator output crosses through 2k, as shown in FIG. 7.
The purpose of the divider is to compute the quotient
  Q  =      b          T      clk      where b is the amount of time between the phase-crossing point and the next clock edge, as shown in FIG. 7. Using Δx=Δy/slope, an equivalent expression is
  Q  =            a      ⁡              (        n        )                    accum_in      ⁢              (                  n          -          1                )            where a(n) is the output of the accumulator, after dropping the overflow bit, as indicated in FIG. 7, and accum_in is the value of the input of the accumulator in the previous cycle. Since 0≦a(n)<accum_in(n−1), it follows that 0≦Q<1.The output of the divider equalsDivOut=q0·q−1q−2q−3q−4q−5q−6 . . . q−m where q0 is worth 1, q−1, is worth ½, q−2 is worth ¼, etc. It's impossible for the divider to compute the exact quotient in cases where it can't be represented using a finite number of binary digits (e.g. ⅓). The last digit of Q is nearest-neighbor rounded. This is implemented by examining the final partial remainder. Because of the rounding, the range of DivOut is 0≦DivOut≦1, which is different from the range of Q in that it's inclusive of one.In a typical prior-art system, the TapPick is computed using:TapPick=2N−round(2NQ)where N is the width of the DTC. The form of this equation follows from the following observations. As described above, Q is the ratio Q=b/Tclk, where b is the distance from the rising edge of the pulse to the next clock edge. On the other hand, as noted in the description of the DTC, TapPick is proportional to the distance from the prior clock edge to the rising edge of the pulse.Given that the last digit of the output of the divider is rounded-to-the-nearest, TapPick can be computed using DivOut only if m≧N. If m>N, rounding is required; but if m=N, no rounding is required, since the last digit of DivOut is already rounded-to-the-nearest. Hence,TapPick=2N−round(2N DivOut), if m>N TapPick=2N−(2N DivOut), if m=N It is a waste to make the divider compute more quotient digits than necessary, i.e. m>N. Since TapPick is rounded to the nearest integer, the error due to rounding, i.e. the quantization error, is white, i.e. it has a flat spectral density. (This assumes the output is modulated, or that dither is used if the output is unmodulated, to suppress patterns in the quantization error.)
Applications of ROM-less DDS circuits exist that require a low level of quantization noise. For example, a ROM-less DDS can be used to produce the local oscillator signal for a mixer in a superheterodyne receiver. Also, the output of a ROM-less DDS can be FM/PM modulated and coupled through an amplifier to an antenna; since the output of the ROM-less DDS is a pulsed signal, it can be very efficiently amplified. For applications such as these, certain bands of the spectrum usually require a lower level of noise than other bands. A need exists for a method of shaping the quantization noise. That is, a need exists for a method of pushing noise power from a signal band that is more sensitive to noise into a band that can tolerate a higher level of noise.
Noise-shaping circuits exist for ROM-based DDS circuits. There are 2 undesirable properties associated with these existing circuits. The power dissipated by the loop does not scale with the output frequency; it's approximately a constant independent of the output frequency. Also, existing loops for shaping the quantization noise associated with quantizing the output of the lookup table to produce an input for a D/A converter have the undesirable property of an inflexible notch in the noise relative to a change in frequency. In other words and more precisely, a notch in the noise placed by the loop at a certain frequency remains at this frequency after changing the frequency of the synthesizer output. If the location of the notch is required to change when the output frequency changes, the coefficients of the loop filter have to be changed. A need exists for a noise-shaping circuit for ROM-less DDS circuits that overcomes the detriments described above.